Automotive Ethernet Interface Basics

 

Automotive Ethernet Interface Basics:

In this article, we’ll revisit how Automotive Ethernet interfaces work and provide an overview of its various types, highlighting their key differences and applications.

BLOCK DIAGRAM :

Image Reference OPEN Alliance

MDI (Media Dependent Interface): 

MDI defines how signals are transmitted and received over Ethernet cables, especially in automotive networks using Single-Pair Ethernet

PHY (Physical Layer) Chip: The signal from the PHY chip is transmitted over twisted-pair cables.

DC Blocking / AC Coupling Capacitor: Placed in series between the PHY and the Ethernet cable to block any DC bias and protect the system. AC Coupling is realized by 100nF Coupling Capacitor to form a high pass filter together with 50Ohm termination on each line.

Signal Integrity: The capacitor ensures that only the desired AC signal (which carries data) is passed to the PHY, while any DC bias is blocked.

CMC (Common Mode Choke) is used to reduce electromagnetic interference and noise, ensuring reliable data transmission in noisy automotive environments.

Common mode Termination :

For common-mode termination, a split termination consisting of two 1kΩ resistors and a 4.7nF capacitor, with a 100 kΩ resistor to GND, can be connected to the signal lines between the coupling capacitors and the connector. For reasons of symmetry, the tolerance of the two 1 kΩ resistors should be within ±1 %. The power rating should be higher than 0.4 W (anti-surge) in order to survive EMI disturbances. They match the impedance of the Ethernet cable, prevent signal reflections, and ensure that the data stays accurate. Those are not be shown in the image above.

Automotive Ethernet Standard	IEEE Standard	Speed	Media	Use Case
100BASE-T1	IEEE 802.3bw	100 Mbps	Single-Pair Ethernet (SPE)	Low-speed applications (e.g., sensors, body control modules)
1000BASE-T1	IEEE 802.3bp	1 Gbps	Single-Pair Ethernet (SPE)	Infotainment, ADAS, high-speed sensor networks
10GBASE-T1	IEEE 802.3bm	10 Gbps	Single-Pair Ethernet (SPE)	High-performance applications, autonomous vehicles, HD video
10BASE-T1S	IEEE 802.3cg	10 Mbps	Single-Pair Ethernet (SPE)	Low-bandwidth applications, diagnostic communication
10BASE-T1L	IEEE 802.3cg	10 Mbps	Single-Pair Ethernet (SPE)	Long-reach applications, energy management in EVs

In these standards, T1 refers to a single twisted pair Ethernet media, and the numbers indicate the speed:

• 100BASE-T1: 100 Mbps
• 1000BASE-T1: 1 Gbps
• 10GBASE-T1: 10 Gbps

The S and L denote short and long-range capabilities, with S supporting up to 25 meters for low-speed data transfer and L supporting up to 1000 meters for industrial applications.

Clock Frequency :

In Automotive Ethernet, the PHY’s clock frequency depends on the Ethernet standard and application: 

For 1000BASE-T1, a 125 MHz clock is commonly used.

A crystal oscillator generates the stable clock, sometimes using lower frequencies (e.g., 25 MHz or 50 MHz) to feed into a Phase-Locked Loop (PLL) that multiplies the frequency to achieve the required clock rate.

For example, to transmit 1 Gbps data over Automotive Ethernet using a 25 MHz clock, the clock is typically used to generate timing and encoding signals necessary for high-speed data transmission.                   

Example:

MII (Media Independent Interface):

MII Interface has total Pin counts of 16 for data transfer those are given below

RMII (Reduced Media Independent Interface) :

MII vs. RMII Pin Count Reduction

RGMII Interface has total Pin counts of 8 for data transfer those are given below

GMII (Serial Gigabit Media Independent Interface):

GMII Interface has total Pin counts of 24 for data transfer those are given below

RGMII (Reduced Gigabit Media Independent Interface):

RGMII Interface has total Pin counts of 12 for data transfer those are given below

SGMII (Serial Gigabit Media Independent Interface):

Number of Pairs Used: SGMII uses 2 pairs (Tx+/−, Rx+/−) for data transmission.

SGMII Data Rate Calculation with 8b/10b Encoding

SGMII operates at 1 Gbps Ethernet, but due to 8b/10b encoding overhead, the actual serial data rate is:

$$\frac{1000 \text{ Mbps} \times 10}{8} = 1250 \text{ Mbps} (1.25 \text{ Gbps})$$

The extra 250 Mbps is used for encoding overhead.

Why Encoding is Needed in SGMII?

Since SGMII is a high-speed serial interface (1.25 Gbps), it needs encoding to:

1. Maintain DC balance – Ensures equal numbers of 1s and 0s to avoid signal bias.
2. Enable clock recovery – Embeds clock information into the data stream, eliminating the need for a separate clock signal.
3. Improve error detection – Detects invalid data sequences and transmission errors.

How 8b/10b Encoding Works in SGMII

1. Each 8-bit data byte is converted into a 10-bit codeword before transmission.
2. The extra 2 bits help in DC balance, clock synchronization, and error detection.
3. The receiver decodes the 10-bit data back into 8-bit data.

Comparison Summary:

$$Encoding:$$

8B/10B Encoding: SGMII uses 8B/10B encoding. This encoding scheme means that for every 8 bits of actual data, 10 bits are transmitted to ensure error detection and synchronization. This encoding reduces the raw data rate and ensures reliable transmission but doesn't affect the number of bits sent.

Effective Data Rate: Because of the 8B/10B encoding:

• $$The\; data\; rate\; is\; effectively\; reduced\; by\; a\; factor\; of\; 10/8\; (or\; 1.25).$$
• $$So,\; although\; the\; raw\; transfer\; rate\; is\; 625\; Mbps,\; the\; effective\; data\; rate\; (the\; actual\; data\; used\; by\; the\; system)\; is\; increased\; to\; 1\; Gbps.$$

Efficiency = 8/10 =0.8 (80%)

Effective Data Rate =RAW line rate x Efficiency 

Raw Line rate = 125Mhz x 10Bits per clock  = 1.25Gbps

Effective Data Rate =1.25Gbps x0.8 = 1Gbps

                                                                         Image Credits: LATTICE 

Parallel Data Stage (Before Serialization)

Data inside the Ethernet PHY or MAC is handled in parallel format.

For 1 Gbps Ethernet, 8 bits of data are transferred per clock cycle between the MAC and PHY.

The clock speed at this stage is 125 MHz

125MHz×8bits per clock cycle=1Gbps

So, 125 MHz is the clock frequency used for parallel data transfers (internal to MAC/PHY).

Serial Data Stage (Over the SGMII Link)

Over the SGMII serial interface, the data is serialized, requiring a much higher clock frequency  (625Mhz) to maintain the same data rate (1 Gbps with 8b/10b encoding).

Why 625 MHz in the Serial Stage?

The serial data on the SGMII link uses 8b/10b encoding, meaning every 8 bits of data becomes 10 bits on the wire. This increases the line rate by 25%:

1Gbps (data rate)×1.25=1.25Gbps (raw line rate).

In serialized mode:

1 clock cycle transmits 2 bits of serialized data.

To achieve the 1.25 Gbps raw line rate, the clock frequency is:

Clock Frequency= Raw Line Rate / Bits Per Clock Cycle =1.25Gbps/2 =625Mhz

Why Encoding Matters in SGMII ?

Clock Recovery:

• In serial interfaces like SGMII, the clock signal is not transmitted as a separate signal (unlike parallel interfaces, which have a dedicated clock line). Instead, the clock is embedded in the data stream.
• Encoding schemes like 8b/10b introduce transitions in the signal to ensure sufficient edges (transitions from high to low or low to high) for the receiver to recover the clock from the data stream.

DC Balance:

High-speed serial transmission requires a balanced DC component to avoid signal degradation caused by too many consecutive 1s or 0s.

8b/10b encoding ensures DC balance by mapping 8-bit data to 10-bit symbols, which are carefully designed to maintain equal numbers of 1s and 0s.

Error Detection:

Encoding adds redundancy to the data stream, enabling basic error detection at the physical layer.

In SGMII, this redundancy helps ensure that any errors in transmission (caused by noise, interference, etc.) can be identified and handled.

Encoding Techniques:

• NRZ/PAM2 (Non-Return to Zero / Pulse Amplitude Modulation 2 levels)
• PAM3
• PAM4
• PAM5

These encoding techniques are used to manage the signaling, data transfer rates, and overall performance of high-speed Ethernet in automotive applications.

PAM3 EXAMPLE:

Three Amplitude Levels:

• PAM-3 uses three distinct voltage levels (or amplitudes) to represent data.
• For example, the levels could be: -V, 0, and +V, where:
  • -V represents a logical 0,
  • 0 represents a neutral or idle state (often used for synchronization or control),
  • +V represents a logical 1.

How PAM-3 Works:

• In PAM-3, each symbol (group of bits) is encoded using three levels. This allows more information to be transmitted per symbol compared to binary encoding, where only two levels (e.g., 0 and 1) are used.
• A single PAM-3 symbol can represent 2 bits of information:
• Level -V could represent 00,
• Level 0 could represent 01,
• Level +V could represent 10.

Example:

we want to encode the binary data 101011 using PAM-3.

Divide the data into pairs of bits:

10, 10, 11

Map the pairs of bits to PAM-3 levels:

10 → +V

01 → 0

00 → -V

The encoded signal will consist of +V, 0, -V for the input data 101011.

MDI Clock Frequency Calculation:

Assumption:

Data rate: 1000Mbps (1Gbps)

Modulation scheme: PAM-3

Encoding Scheme: 4B/3T

Find Symbol Rate Fs  = Data Rate / Bits per Symbol.

Note:

1000Base-T1 uses an encoding scheme (4B/3T). We should also consider its effect.

The MDI clock in Ethernet systems represents the frequency at which the Ethernet PHY transmits data over the twisted pair cable.

PAM3 Modulation: (Pulse Amplitude modulation 3-Level). This modulation technique uses 3 different voltage levels to represent data, hence the "3" in PAM3.

There are 3 levels are typically mapped to the values -1, 0 and +1.

                            

Bits Per Symbol:

  

Since 3 levels, each symbol can carry   log2(3)= 1.585 bits of Information.

If no Coding is used the symbol rate would be (the number of symbols transmitted per second) is:

Symbol Rate=Data Rate / Bits per Symbol

=​ 1000Mbps/ 1.58bits per symbol = 630.91Mbaud 

However, 1000Base-T1 doesn't use raw PAM-3 transmission, but instead applies and encoding scheme (4B/3T) before modulation.

​

4B/3T Encoding means "4-Bit groups are encoded into 3 ternary symbols".

Instead of sending 4 raw bits, we convert them into 3 ternary symbols.

This introduce an overhead factor of (3/4). meaning Symbol rate increases to accommodate the encoding.

Encoding overhead = 4 bits / 3sysmbols = 1.333bits per symbol

Additional error correction, Scrambling and framing reduce the effective rate.

Adjusted Symbol rate with encoding 

= 1000Mbps/ 1.333bits per symbol = ~750Mbaud

The practical standardized symbol rate is 750Mbaud

TC10:

TC10 is an automotive Ethernet standard that defines a sleep mode and wake-up mechanism

TC10 defines PHY current consumption to be less than 35 microamps while in TC10 sleep. These sleep requests and wake-up pulses are exchanged over the Ethernet cable without needing a dedicated wakeup wire. These sleep requests will be initiated by the Ethernet MAC using software registers.

The PHY can then be woken up by two methods.
1. Local Wakeup
2.Remote Wakeup

Reference:

100BASE-T1 Ethernet: the evolution of automotive networking

Automotive Ethernet Specifications

TC10-Wake-up-and-Sleep-Specification-for-Automotive-Ethernet

What is the TC10 automotive Ethernet standard and why is it important?

April 2014IPUG60_02.1