Bluetooth Tutorial (In progress)

Frequency Hopping:

Bluetooth Physical Layer Simulator

System Ready

Protocol: BLE (40 Ch) Protocol: Classic (79 Ch) Mode: AFH (Adaptive) Mode: FHSS (Blind)

Speed

MIPI Explained: How Data Travels from Cameras and Displays to Processors

 MIPI Explained: How Data Travels Between Devices

A modern camera can generate millions of pixels every second, and a display needs to update those pixels continuously. How can all that information travel through just a few wires?

That's where MIPI comes in.

Why MIPI?

Older display interfaces such as RGB used many parallel data lines.

As display resolution increased, designers faced several challenges:

• More PCB routing
• Larger connectors
• Higher EMI
• Increased system cost

MIPI solves this by converting parallel data into high-speed serial data.

Instead of using dozens of signals, data is transmitted through a small number of high-speed lanes.

Two Parts of MIPI

Protocol Layer

The protocol decides:

• What data is being sent
• How it is organized
• How the receiver interprets it

Examples:

• CSI-2 for cameras
• DSI-2 for displays

You can think of the protocol layer as data packaging.

PHY Layer

The PHY decides:

• Voltage levels
• Timing
• Clocking
• Electrical signaling

You can think of the PHY layer as the transportation system.

D-PHY and C-PHY

D-PHY is the most commonly used MIPI physical layer.

Each lane consists of two signals:

• D+
• D-

The receiver looks at the voltage difference between the two wires rather than the voltage on a single wire.

This improves noise immunity and reduces EMI.

C-PHY is a newer MIPI physical layer designed to provide higher bandwidth with fewer connections.

Each lane consists of three signals:

• Dp or A
• Dn or B
• Dc or C

These three wires form a trio.

Unlike D-PHY, C-PHY does not use traditional differential pairs. Instead, the receiver looks at the relative voltage relationship between the three wires and decodes the data from the different signal states.

This allows more information to be transferred per symbol compared to D-PHY.

Benefits of C-PHY:

• Higher bandwidth with fewer pins
• Reduced connector size
• Better PCB routing efficiency
• Suitable for high-resolution cameras and displays

Common applications:

• High-resolution camera sensors
• 4K/8K displays
• Advanced automotive infotainment systems
• ADAS camera systems

---

DSI Example Calculation

Suppose we have:

Display Resolution = 1920 × 1080

Refresh Rate = 60 Hz

Color Depth = 24 bits/pixel

Pixel Rate:

1920 × 1080 × 60

= 124.4 Million Pixels/sec

Required Bandwidth:

124.4M × 24

= 2.98 Gbps

Ignoring protocol overhead, the display needs approximately 3 Gbps.

If we use:

4 D-PHY lanes

Bandwidth per lane:

3 Gbps ÷ 4

= 750 Mbps/lane

A 500 MHz DDR clock provides:

1 Gbps/lane

which is sufficient for this display.

---

What Does "Double Data Rate" Mean?

One thing that often confuses engineers is the D-PHY clock.

Suppose the clock lane operates at:

500 MHz

Data is transferred on:

• Rising edge
• Falling edge

Because data moves on both edges:

Data Rate = 2 × Clock Frequency

So:

500 MHz Clock = 1 Gbps per lane

This is called Double Data Rate (DDR).

The clock is 500 MHz, but the lane transfers 1 billion bits every second.

---

CSI Example Calculation

Consider a camera:

Resolution = 1920 × 1080

Frame Rate = 30 fps

RAW10 Format = 10 bits/pixel

Bandwidth:

1920 × 1080 × 30 × 10

= 622 Mbps

Including packet overhead and blanking, the requirement is typically around:

700 to 800 Mbps

With two D-PHY lanes:

800 Mbps ÷ 2

= 400 Mbps/lane

This is well within the capability of a standard D-PHY interface.

---

Real System Example

In a vehicle infotainment system:

Camera → CSI-2 → D-PHY → SoC

The camera sends image data to the processor.

The processor then generates display data:

SoC → DSI → D-PHY → Display

The protocol organizes the information.

The PHY moves the information.

Every frame shown on the display and every image captured by the camera follows this same basic path.

MIPI DSI Bandwidth Calculator

MIPI DSI Comprehensive Bandwidth Calculator

Metric	Value	Formula

Calculation Mode: Precise Timing Percentage Estimate

Active Width

Active Height

Color Depth (bpp)161824

Data Lanes124

Refresh Rate (Hz)

Protocol Overhead (%)

HFP

HSYNC

HBP

VFP

VSYNC

VBP

Blanking Percentage (%)

TFT Display Timing

TFT Display Timing Visualizer

Watch the dot scan across the virtual frame to see how PCLK, HSYNC, VSYNC, and DE work together to draw an image on a screen.

Frame Scanning Area

DE Signal:

Speed:

Sync (H/V)

Back Porch

Active Data (DE)

Front Porch

Live Logic Signals

PCLK: Pixel Clock. Pulses once for every single pixel position.

DE: Data Enable. High ONLY when scanning the Active Data area.

HSYNC: Horizontal Sync. Pulses to start a new row.

VSYNC: Vertical Sync. Pulses to start a new frame.

What do these terms mean?

Front Porch (FP)

A brief delay after the active pixel data finishes, but before the sync pulse occurs. It gives the hardware a moment to stabilize.

Sync Pulse (HSYNC/VSYNC)

A signal telling the display panel to reset its drawing position back to the beginning of the next line (HSYNC) or back to the top-left (VSYNC).

Back Porch (BP)

A brief delay after the sync pulse ends, but before the actual pixel data begins. It provides settling time.

Active Area / Data Enable (DE)

The portion of the timing cycle where actual, visible pixels are drawn on the screen. The DE signal goes HIGH.

---

How does a TFT Panel Work?

A Thin-Film-Transistor (TFT) display consists of a massive grid of pixels. To display an image, the screen can't light up all pixels simultaneously. Instead, it draws them one by one, scanning from left to right, and top to bottom (exactly like the visualizer above). The timing signals act as the conductor of this orchestra, ensuring the display panel knows exactly when and where to place the incoming color data.

GMSL2 Deserializer to TFT Signals

In modern systems (like automotive infotainment systems or remote industrial displays), video is often transmitted over long distances using a high-speed serial link like GMSL2 (Gigabit Multimedia Serial Link). A Serializer compresses the video at the source, sends it over a single cable, and a Deserializer translates it back into signals the TFT panel understands.

Here are the primary signals passed from the GMSL2 Deserializer to a traditional parallel RGB TFT panel:

1. Timing & Synchronization

• PCLK (Pixel Clock): The continuous heartbeat that clocks data into the display.
• VSYNC & HSYNC: The structural boundaries of the frame and lines.
• DE (Data Enable): Gates the active color data so the screen only draws when valid.

2. Video Data (RGB)

Parallel data lines carrying the color info. For a 24-bit display (RGB888), there are 24 physical wires representing Red, Green, and Blue intensities for the exact pixel currently being drawn.

3. Control Interfaces

Usually an I2C or SPI interface passed through the GMSL link. This allows the main processor to configure panel registers, adjust gamma, or read diagnostic information.

4. Backlight & Power

Hardware signals, often including a PWM (Pulse Width Modulation) pin to control screen brightness, an Enable pin to turn the display on/off, and standard power rails (VDD).

---

The Brains of the Panel: The TCON

It's important to note that the signals from the GMSL2 Deserializer don't connect directly to the glass pixels. Instead, they feed into an IC usually located directly on the display module called the Timing Controller (TCON). The TCON acts as the ultimate conductor for the panel. It takes the standard logic-level signals (PCLK, Syncs, DE, and RGB data) and translates them into the precise, high-voltage analog signals required by the panel's Source and Gate drivers. If the TCON doesn't receive a valid DE signal (try toggling it off in the visualizer above!), it won't instruct the drivers to update the screen, resulting in a blank display.

*Note: Many modern displays use MIPI DSI or eDP instead of parallel RGB, which packages these timing syncs and data into high-speed data packets. I will add the MIPI DSI and eDP protocol details in the next blog post, stay tuned!

Reference: Click here to learn more about TFT Timing

Modernizing Automotive Electronics: Surviving ISO 7637-2 Pulses and the Dreaded Load Dump

Modern cars are full of Electronic Control Units (ECUs) managing everything from fuel injectors to infotainment screens. These sensitive components are directly tied to the vehicle's 12V battery and charging system, a surprisingly hostile electrical environment. Every time a relay clicks or a motor turns on, voltage transients can surge through the power line, capable of destroying unprotected hardware.

ISO 7637-2 is the definitive international standard governing these transients. Understanding and designing for these test pulses is critical for ensuring automotive reliability. In this guide, we break down each major pulse type, its cause, its effect, and the proper protection strategy.

2. The Transients: Deep Dive into Each Pulse

Pulse 1 (Negative Spike)

Pulse 1 simulates the rapid turning OFF of an inductive load (e.g., fuel injectors, solenoids, or relays) when the power is suddenly removed. A typical scenario is turning off a fan or a clutch.

Vehicle Event: Inductive load (solenoid, motor, relay) is switched OFF.

The Waveform: A massive negative-going spike that can dip to -100V with a long duration (2ms). This is a reverse polarity event.

Impact if Unprotected: The entire vehicle power line goes negative. This can cause LDO (voltage regulator) upset, MCU resets, communication loss, and reverse bias damage to sensitive ICs.

Protection Strategy:

Pulse 2a (Positive Spike)

Pulse 2a is the inverse of Pulse 1; it simulates the rapid switching ON of an inductive load (like a relay, motor, or compressor clutch). The transient energy is released when the coil begins to build a magnetic field.

Vehicle Event: Inductive load (relay, motor) is switched ON.

The Waveform: A short, fast, positive-going pulse that can spike to +37V. While its duration is short (50µs), its rise time is incredibly fast (1µs).

Impact if Unprotected: The power line voltage momentarily jumps. This causes communication disturbances, ADC (analog-to-digital converter) errors, and can overstress lower-voltage LDO regulators on the board.

Protection Strategy:

Pulse 2b (Low Amplitude, Slow Spike)

Pulse 2b specifically models the behavior of a DC motor winding acting as a generator after power is cut. Common scenarios are window motors or radiator fans coasting down.

Vehicle Event: DC motor is switched OFF, coasting.

The Waveform: A moderate positive-going pulse that only reaches +10V. Its characteristic feature is its slow rise time and extremely long duration (20ms).

Impact if Unprotected: A sustained slight overvoltage. This primarily affects analog sensors, causing reading disturbances and minor glitches in serial communication.

Protection Strategy:

Pulse 3a (Negative, Fast Spike)

Pulse 3a is part of the 'switching spikes' test. It simulates high-frequency negative noise, specifically the mechanical opening (arcing) of switch contacts.

Vehicle Event: Switch contact bounce (opening).

The Waveform: A very fast, severe, negative-going spike that can reach -150V. It is a burst of high-frequency energy with an incredibly short duration (100ns).

Impact if Unprotected: This pulse easily couples into adjacent IC signal pins. It causes CAN/LIN data bit errors, false interrupt triggers, and can force an MCU to reset.

Protection Strategy:

Pulse 3b (Positive, Fast Spike)

Pulse 3b is the companion to 3a. It simulates high-frequency positive noise, specifically the mechanical closing (arcing/bounce) of switch contacts.

Vehicle Event: Switch contact bounce (closing).

The Waveform: The fast, positive counterpart to 3a, peaking at +150V with an ultra-short 100ns duration.

Impact if Unprotected: This high-frequency pulse injects significant charge directly into sensitive IC logic inputs, causing CAN/LIN transmission errors and false digital signal triggers (e.g., GPIO false triggers).

Protection Strategy:

Load Dump (The Heavyweight)

The Load Dump is the most severe and energy-rich transient defined in ISO 7637-2. It occurs when the battery is suddenly disconnected while the alternator is actively generating a high charging current (e.g., poor battery terminal connection).

Vehicle Event: Alternator failure or battery disconnection while charging.

The Waveform: A massive, long-duration positive surge. Unprotected, this surge can reach 120V and last up to 400ms. Even with basic 'centralized' alternator suppression, the ECU still sees a reduced but dangerous surge of 35V to 40V for 200ms.

Impact if Unprotected: Total system failure. High energy causes voltage regulator (LDO) failure, catastrophic power MOSFET breakdown, and permanent MCU damage. It is a "smoke test" failure.

Protection Strategy: High-power TVS diode suppression is critical to clamp the ECU input voltage.

The 'Protected Pulse' waveform shown in this figure represents the voltage seen by the ECU when proper centralized suppression is active, showing the critical role of a high-power TVS diode.

© 2026 Automotive Engineering Blog. Stay safe in the hostile 12V environment.

SMART WATCH TEARDOWN

 

SMART WATCH TEARDOWN

Smartwatches have become an important part of our daily lives. They help us track our fitness, receive notifications, and even make calls. But have you ever wondered what is inside a smartwatch?

In this blog, we will take apart a smartwatch to see its internal components. We will explore the display, battery, sensors, processor, and other key parts. This teardown will help us understand how a smartwatch works and how all the small components fit together in a compact design.

Let’s begin the teardown and discover the technology inside a smartwatch!

Before Opening

Here’s a breakdown of the components:

Battery (LQ-S1) – This is a 3.7V, 380mAh rechargeable lithium battery. It powers the smartwatch and is designed for low-power operation.

Main Circuit Board (PCB) – This green board contains the key electronic components.

1: VIBRATION MOTOR

2: SPEAKER

3: PCB ANTENNA

4: MINI USB CONNECTOR

5: BATTERY CONNECTOR

6: SIM SLOT

7: CAMERA

8: SD CARD SLOT

9: POWER SWITCH

10:GSL 2036 Touch Controller IC

Touch Controller IC

11,12 DISPLAY CONNECTORS

13. MEDIATEK PROCESSOR (MT6260)

PROCESSOR

Datasheet Link: Click here

14: CRYSTAL

15: POWER IC MS5525

16: MIC

17: DISPLAY

TOCUH SCREEN

PCB TOP SIDE

Conclusion:

Through this teardown, we explored the internal components of a smartwatch and understood how different parts work together. The battery, camera, display, main processor (MT6260), SIM card slot, vibration motor, and other key components make the smartwatch functional and compact.

This teardown gives us a better idea of the engineering behind smartwatches. It shows how manufacturers fit advanced technology into such a small device while balancing performance, power efficiency, and connectivity.

Hope you found this teardown interesting! Stay tuned for more tech breakdowns. 

Automotive Ethernet Interface Basics

 

Automotive Ethernet Interface Basics:

In this article, we’ll revisit how Automotive Ethernet interfaces work and provide an overview of its various types, highlighting their key differences and applications.

BLOCK DIAGRAM :

Image Reference OPEN Alliance

MDI (Media Dependent Interface): 

MDI defines how signals are transmitted and received over Ethernet cables, especially in automotive networks using Single-Pair Ethernet

PHY (Physical Layer) Chip: The signal from the PHY chip is transmitted over twisted-pair cables.

DC Blocking / AC Coupling Capacitor: Placed in series between the PHY and the Ethernet cable to block any DC bias and protect the system. AC Coupling is realized by 100nF Coupling Capacitor to form a high pass filter together with 50Ohm termination on each line.

Signal Integrity: The capacitor ensures that only the desired AC signal (which carries data) is passed to the PHY, while any DC bias is blocked.

CMC (Common Mode Choke) is used to reduce electromagnetic interference and noise, ensuring reliable data transmission in noisy automotive environments.

Common mode Termination :

For common-mode termination, a split termination consisting of two 1kΩ resistors and a 4.7nF capacitor, with a 100 kΩ resistor to GND, can be connected to the signal lines between the coupling capacitors and the connector. For reasons of symmetry, the tolerance of the two 1 kΩ resistors should be within ±1 %. The power rating should be higher than 0.4 W (anti-surge) in order to survive EMI disturbances. They match the impedance of the Ethernet cable, prevent signal reflections, and ensure that the data stays accurate. Those are not be shown in the image above.

Automotive Ethernet Standard	IEEE Standard	Speed	Media	Use Case
100BASE-T1	IEEE 802.3bw	100 Mbps	Single-Pair Ethernet (SPE)	Low-speed applications (e.g., sensors, body control modules)
1000BASE-T1	IEEE 802.3bp	1 Gbps	Single-Pair Ethernet (SPE)	Infotainment, ADAS, high-speed sensor networks
10GBASE-T1	IEEE 802.3bm	10 Gbps	Single-Pair Ethernet (SPE)	High-performance applications, autonomous vehicles, HD video
10BASE-T1S	IEEE 802.3cg	10 Mbps	Single-Pair Ethernet (SPE)	Low-bandwidth applications, diagnostic communication
10BASE-T1L	IEEE 802.3cg	10 Mbps	Single-Pair Ethernet (SPE)	Long-reach applications, energy management in EVs

In these standards, T1 refers to a single twisted pair Ethernet media, and the numbers indicate the speed:

• 100BASE-T1: 100 Mbps
• 1000BASE-T1: 1 Gbps
• 10GBASE-T1: 10 Gbps

The S and L denote short and long-range capabilities, with S supporting up to 25 meters for low-speed data transfer and L supporting up to 1000 meters for industrial applications.

Clock Frequency :

In Automotive Ethernet, the PHY’s clock frequency depends on the Ethernet standard and application: 

For 1000BASE-T1, a 125 MHz clock is commonly used.

A crystal oscillator generates the stable clock, sometimes using lower frequencies (e.g., 25 MHz or 50 MHz) to feed into a Phase-Locked Loop (PLL) that multiplies the frequency to achieve the required clock rate.

For example, to transmit 1 Gbps data over Automotive Ethernet using a 25 MHz clock, the clock is typically used to generate timing and encoding signals necessary for high-speed data transmission.                   

Example:

MII (Media Independent Interface):

MII Interface has total Pin counts of 16 for data transfer those are given below