555 Timer
555 Timer Monostable operation:
The LM555 timer acts as a “one-shot” pulse generator. The pulse beings when the LM555 timer receives a signal at the trigger input that falls below a 1/3 of the voltage supply. The width of the output pulse is determined by the time constant of an RC network. The output pulse ends when the voltage on the capacitor equals 2/3 of the supply voltage. The output pulse width can be extended or shortened depending on the application by adjusting the R and C values.
In this mode of operation, the timer functions as a one-shot (Figure 1). The external capacitor is initially held discharged by a transistor inside the timer. Upon application of a negative trigger pulse of less than 1/3 VCC to pin 2, the flip-flop is set which releases the short circuit across the capacitor and drives the output high. The voltage across the capacitor then increases exponentially for a period of t = 1.1 RA C, at the end of which time the voltage equals 2/3 VCC. The comparator then resets the flip-flop which in turn discharges the capacitor and drives the output to its low state.
The amount of time that the output voltage remains “HIGH” or at a logic “1” level, is given by the following time constant equation.
Downloads:
To download Proteus simulation click here.
The LM555 timer acts as a “one-shot” pulse generator. The pulse beings when the LM555 timer receives a signal at the trigger input that falls below a 1/3 of the voltage supply. The width of the output pulse is determined by the time constant of an RC network. The output pulse ends when the voltage on the capacitor equals 2/3 of the supply voltage. The output pulse width can be extended or shortened depending on the application by adjusting the R and C values.
In this mode of operation, the timer functions as a one-shot (Figure 1). The external capacitor is initially held discharged by a transistor inside the timer. Upon application of a negative trigger pulse of less than 1/3 VCC to pin 2, the flip-flop is set which releases the short circuit across the capacitor and drives the output high. The voltage across the capacitor then increases exponentially for a period of t = 1.1 RA C, at the end of which time the voltage equals 2/3 VCC. The comparator then resets the flip-flop which in turn discharges the capacitor and drives the output to its low state.
Figure 1. Monostable
T = 1.1 R1*C
Example:
Figure 2: Simulation result
Formulas:
To find R = t / 1.1 *C
let's calculate for 500ms pulse, we will take a 10uF capacitor
R= 0.5Sec / 1.1*10uF
R = 45.4545 K
let's simulate the circuit with 45.6K
Figure 4: Simulation result with R1=41.6k, we got 505.00ms because of resistor 41.6k resistor.
To download Proteus simulation click here.
